Abstract: The speed of internal RNS arithmetic circuits as well as speed and complexity of residue to binary converter are two important and effective factors in performance of a residue number system. In this paper, the new moduli set { 2^2n+1, (2^2n+1)–1, (2^n+1)–1} with 5n-bit dynamic range has been introduced. Since this moduli set is free of (2n+1)-type modulus, it has a fast RNS arithmetic unit. Also, an efficient residue to binary converter with two-level architecture based on the new Chinese remainder theorem 1 (New CRT-I) has been designed for this moduli set, which offers lower delay and hardware cost in comparison to the recently introduced moduli sets { 2^n+k, (2^2n)–1, (2^2n)+1} and {2^2n,( 2^2n)+1–1, (2^n/2)+1, (2^n/2)–1} with the same dynamic range. The designed converter for proposed moduli set is Rom-free and only based on carry save adders and modular adders. Hence it can be efficiently implemented by VLSI circuits.